and SILC---Authenticated Encryption Schemes for Constrained Devices
An authenticated encryption scheme (AE) is a symmetric-key cryptographic function
for both confidentiality and integrity.
CLOC and SILC are blockcipher modes for AE designed in 2014,
where CLOC stands for Compact Low-Overhead CFB and SILC for SImple Lightweight CFB.
The main target of these modes is constrained devices having limited
resources for computation and memory, which will play the
key role in the forthcoming era of Internet of Things (IoT).
CLOC and SILC are designed to minimize the memory and computation
overhead beyond the underlying blockcipher, and they show good performance for short input data.
The primary focus of CLOC is embedded software, such as low-end 8-bit
micro-controllers, and the focus of SILC is small hardware, such as RFID
or ASIC, or programmable logic device, e.g. CPLD.
CLOC and SILC are candidates of CAESAR, a cryptographic competition of AE organized by leading cryptographers.
CLOC was first presented at FSE 2014, and SILC was first presented at
Tetsu Iwata (Nagoya University, Japan)
Kazuhiko Minematsu (NEC Corporation, Japan)
Jian Guo (Nanyang Technological University, Singapore)
Sumio Morioka (NEC Europe, United Kingdom)
CLOC designers, and Eita Kobayashi (NEC Corporation, Japan)
Talks and slides
- Slides from FSE 2014 (CLOC)
- Slides from DIAC 2014 (SILC)
- Slides from DIAC 2015 (CLOC v2 and SILC v2)
- Slides from DIAC 2016 (CLOC and SILC v3)
- Reference C software is available from here
- Local copy of round 2 reference C software is available from here
- Test vectors of CLOC v1 and SILC v1 are available from here and here (w/ intermediate values)
- Test vectors of CLOC v2 and SILC v2 are available from here and here (w/ intermediate values)
- Local copy of round 2 hardware submission is available from here for CLOC and here for SILC
- Local copy of round 3 reference C software is available from here
iwata (at) cse (dot) nagoya-u (dot) ac (dot) jp
Last update: October 27, 2016.